UP

DEVELOPER INFO


GENERAL INFORMATION

XSCHEM uses layers for its graphics, each layer is a logical entity defining graphic attributes like color and fill style. There are very few graphical primitive objects:

  1. Lines
  2. Rectangles
  3. Open / close Polygons
  4. Arcs / Circles
  5. Text

These primitive objects can be drawn on any layer. XSCHEM number of layers can be defined at compile time, however there are some predefined layers (from 0 to 5) that have specific functions:

  1. Background color
  2. Wire color (nets)
  3. Selection color / grid
  4. Text color
  5. Symbol drawing color
  6. Pin color
  7. General purpose
  8. General purpose
  9. General purpose

....

  1. General purpose
  2. General purpose

Although any layer can be used for drawing it is strongly advisable to avoid the background color and the selection color to avoid confusion. Drawing begins by painting the background (layer 0), then drawing the grid (layer 1) then drawing wires (nets) on layer 2, then all graphical objects (lines, rectangles, polygons) starting form layer 0 to the last defined layer.

SYMBOLS

There is a primitive object called symbol. Symbols are just a group of primitive graphic objects (lines, polygons, rectangles, text) that can be shown as a single atomic entity. Once created a symbol can be placed in a schematic. The instantiation of a symbol is called 'component'.

The above picture shows a resistor symbol, built drawing some lines on layer 4 (green), some pins on layer 5 (red) and some text. Symbols once created are stored in libraries (library is just a UNIX directory known to XSCHEM) and can be placed like just any other primitive object multiple times in a schematic window with different orientations.

WIRES

Another special primitive object in XSCHEM is 'Wire', Graphically it is drawn as a line on layer 1 (wires). Wires are drawn only on this layer, they are treated differently by XSCHEM since they carry electrical information. Electrical connection between components is done by drawing a connecting wire.

Since wires are used to build the circuit connectivity it is best to avoid drawing lines on layer 1 to avoid confusion, since they would appear like wires, but ignored completely for electrical connectivity.

PROPERTIES

All XSCHEM objects (wires, lines, rectangles, polygons, text, symbol instance aka component) have a property string attached. Any text can be present in a property string, however in most cases the property string is organized as a set of key=value pairs separated by white space. In addition to object properties the schematic or symbol view has global properties attached. There is one global property defined per netlisting mode (currently SPICE, VHDL, Verilog, tEDAx) and one additional global property for symbols (containing the netlisting rules usually). See the XSCHEM properties section of the manual for more info.

COORDINATE SYSTEM

XSCHEM coordinates are stored as double precision floating point numbers, axis orientation is the same as Xorg default coordinate orientation:

When drawing objects in XSCHEM coordinates are snapped to a multiple of 10.0 coordinate units, so all drawn objects are easily aligned. The snap level can be changed to any value by the user to allow drawing small objects if desired. Grid points are shown at multiples of 20.0 coordinate units, by default.

XSCHEM FILE FORMAT SPECIFICATION

XSCHEM schematics and symbols are stored in .sch and .sym files respectively. The two file formats are identical, with the exception that symbol (.sym) files usually do not contain wires and component instantiations (although they can).

every schematic/symbol object has a corresponding record in the file. A single character at the beginning of a line, separated by white space from subsequent fields marks the type of object:

the object tag in column 1 is followed by space separated fields that completely define the corresponding object.

VERSION STRING

Example:
v {xschem version=2.9.7 file_version=1.2}

Two attributes are defined, the xschem version and the file format version. Current file format version is 1.2. This string is guaranteed to be the first one in XSCHEM .sch and .sym files. A comment can be added (by manually editing the xschem schematic or symbol file) as shown below:

v {xschem version=3.1.0 file_version=1.2 
* Copyright 2022 Stefan Frederik Schippers
* 
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
*     https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
}

GLOBAL SCHEMATIC/SYMBOL PROPERTIES

Example:
K {type=regulator
format="x@name @pinlist r@symname"
verilog_format="assign @#2 = @#0 ;"
tedax_format="footprint @name @footprint
device @name @symname"
template="name=U1 footprint=TO220"}

Global properties define a property string bound to the parent schematic/symbol file, there is one global property record per netlisting mode, currently SPICE, VHDL, Verilog, tEDAx.
In addition (only in file_format 1.2 and newer) for schematics and symbols there is a global attribute ('K') that defines how to netlist the schematic/symbol if placed as a symbol into another parent schematic (should be set in the same way as the 'G' global attribute for symbols in pre-1.2 file format). Normally only 'G' ('K' in 1.2 file format) type property strings are used for symbols and define attributes telling netlisters what to do with the symbol, while global property strings in schematic files corresponding to the active netlisting mode of XSCHEM are copied verbatim to the netlist.
the object tag (S, V, G, E, K) is followed by the property string enclosed in curly braces ({...}). This allows strings to contain any white space and newlines. Curly braces if present in the string are automatically escaped with the '\' character by XSCHEM when saving data.
Example of the 4 property string records for a schematic file:
G {}
V {assign #1500 LDOUT = LDIN +1;
}
E {}
S {}

in this case only the verilog-related global property has some definition. This is Verilog code that is copied into the output netlist.

Attribute strings for all Xschem objects are enclosed in curly braces. This allows attributes to span multiple lines. This component instance:
C {capa.sym} 890 -160 0 0 {name=C4 m=1 value=10u device="tantalium capacitor"}
and this one:
C {capa.sym} 890 -160 0 0 {name=C4
m=1 value=10u
device="tantalium capacitor"
}

are perfectly equivalent.

TEXT OBJECT

Example: T {3 of 4 NANDS of a 74ls00} 500 -580 0 0 0.4 0.4 {font=Monospace layer=4}
This line defines a text object, the first field after the type tag is the displayed text, followed by X and Y coordinates,rotation, mirror, horizontal and vertical text size and finally a property string defining some text attributes.

WIRE OBJECT

Example: N 890 -130 890 -110 {lab=ANALOG_GND}
Format: N x1 y1 x2 y2 {attributes}
The net 'N' tag is followed by the end point coordinates x1,y1 - x2,y2. (stored and read as double precision numbers) and a property string, used in this case to name the net. In most cases you don't need to specify attributes for nets (one exception is the bus attribute) as the lab attribute is set by xschem when creating a netlist or more generally when building the connectivity. This means that almost always nets in a xschem schematic are set as in following example:
N 890 -130 890 -110 {}
Xschem schematic files store only geometrical data and attributes of the graphic primitives, the connectivity and the logical network is obtained by xschem.

LINE OBJECT

Example: L 4 -50 20 50 20 {This is a line on layer 4}
Format: L layer x1 y1 x2 y2 {attributes}
The line 'L' tag is followed by an integer specifying the graphic layer followed by the x1,y1 - x2,y2 coordinates of the line and a property string.

RECTANGLE OBJECT

Example: B 5 -62.5 -2.5 -57.5 2.5 {name=IN dir=in pinnumber=1}
Format: B layer x1 y1 x2 y2 {attributes}
The 'Box' 'B' tag is followed by an integer specifying the graphic layer followed by the x1,y1 - x2,y2 coordinates of the rectangle and a final property string. This example defines a symbol pin.
A fill=true attribute may be given get a patterned fill (this is the default for rectangles).
A fill=false attribute may be given to avoid a fill pattern.
A fill=full attribute may be given to get a full solid fill.
Example: B 4 100 -300 400 100 {fill=false}

OPEN / CLOSED POLYGON OBJECT

Example: P 3 5 2450 -210 2460 -170 2500 -170 2510 -210 2450 -210 {}
Format: P layer npoints px1 py1 px2 py2 .... {attributes}
the Polygon 'P' tag is followed by an integer specifying the layer number, followed by the number of points (integer), the x,y coordinates of the polygon points and the property string (empty in this example). If the last point is coincident to the first point a closed polygon is drawn. A fill=true attribute may be given to fill a closed polygon, in this case a polygon line looks like:
P 3 5 2450 -210 2460 -170 2500 -170 2510 -210 2450 -210 {fill=true}
A fill=full attribute will paint the polygon with a solid full color (instead of a patterned fill).
A bezier=true attribute will transform the polygon into a bezier curve. See the editor commands page on polygons.

ARC OBJECT

Example: A 3 450 -210 120 45 225 {}
Format: A x y r a b {attributes}
The Arc 'A' tag is followed by an integer specifying the layer number, followed by the arc x, y center coordinates, the arc radius, the start angle (measured counterclockwise from the three o'clock direction), the arc sweep angle (measured counterclockwise from the start angle) and the property string (empty in this example). Angles are measured in degrees.
Arcs can be filled or not:
A fill=true attribute may be given get a patterned fill.
A fill=false attribute may be given to avoid a fill pattern. This is the default
A fill=full attribute may be given to get a full solid fill.
Circles are just arcs with a sweep angle of 360 degrees.
Example: A 4 100 -40 40 0 360 {fill=full}

COMPONENT INSTANCE

Example: C {capa.sym} 890 -160 0 0 {name=C4 m=1 value=10u device="tantalium capacitor"}
Format: C {<symbol reference>} <X coord> <Y coord> <rotation> <flip> {<attributes>}
The component instance tag C is followed by a string specifying library/symbol or only symbol (see This tutorial about symbol references) followed by the x,y coordinates, rotation (integer range [0:3]), mirror (integer range [0:1]), and a property string defining various attributes including the mandatory name=... attribute.
Orientation and mirror meanings are as follows:

EXAMPLE OF A COMPLETE SYMBOL FILE (7805.sym)


G {}
K {type=regulator
format="x@name @pinlist r@symname"
verilog_format="assign @#2 = @#0 ;"
tedax_format="footprint @name @footprint
device @name @symname"
template="name=U1 footprint=TO220"}
V {}
S {}
E {}
L 4 -60 0 -50 0 {}
L 4 50 0 60 0 {}
L 4 -50 -20 50 -20 {}
L 4 50 -20 50 20 {}
L 4 -50 20 50 20 {}
L 4 -50 -20 -50 20 {}
L 4 0 20 0 30 {}
B 5 -62.5 -2.5 -57.5 2.5 {name=IN dir=in pinnumber=1}
B 5 -2.5 27.5 2.5 32.5 {name=GND dir=inout pinnumber=2}
B 5 57.5 -2.5 62.5 2.5 {name=OUT dir=out pinnumber=3}
T {@name} -17.5 -15 0 0 0.2 0.2 {}
T {@symname} -17.5 0 0 0 0.2 0.2 {}
T {@#0:pinnumber} -47.5 -2.5 0 0 0.12 0.12 {}
T {@#1:pinnumber} -2.5 12.5 0 0 0.12 0.12 {}
T {@#2:pinnumber} 47.5 -2.5 0 1 0.12 0.12 {}
 


EXAMPLE OF A COMPLETE SCHEMATIC FILE (pcb_test1.sch)


G {}
K {}
V {}
S {}
E {}
B 20 270 -550 860 -290 {}
T {3 of 4 NANDS of a 74ls00} 500 -580 0 0 0.4 0.4 {}
T {EXPERIMENTAL schematic for generating a tEDAx netlist
1) set netlist mode to 'tEDAx' (Options menu -> tEDAx netlist)
2) press 'Netlist' button on the right
3) resulting netlist is in pcb_test1.tdx } 240 -730 0 0 0.5 0.5 {}
N 230 -330 300 -330 {lab=INPUT_B}
N 230 -370 300 -370 {lab=INPUT_A}
N 680 -420 750 -420 {lab=B}
N 680 -460 750 -460 {lab=A}
N 400 -350 440 -350 {lab=B}
N 850 -440 890 -440 {lab=OUTPUT_Y}
N 230 -440 300 -440 {lab=INPUT_F}
N 230 -480 300 -480 {lab=INPUT_E}
N 400 -460 440 -460 {lab=A}
N 550 -190 670 -190 {lab=VCCFILT}
N 590 -130 590 -110 {lab=ANALOG_GND}
N 790 -190 940 -190 {lab=VCC5}
N 890 -130 890 -110 {lab=ANALOG_GND}
N 730 -110 890 -110 {lab=ANALOG_GND}
N 730 -160 730 -110 {lab=ANALOG_GND}
N 590 -110 730 -110 {lab=ANALOG_GND}
N 440 -460 680 -460 {lab=A}
N 500 -420 680 -420 {lab=B}
N 500 -420 500 -350 {lab=B}
N 440 -350 500 -350 {lab=B}
C {title.sym} 160 -30 0 0 {name=l2 author="Stefan"}
C {74ls00.sym} 340 -350 0 0 {name=U1:2  risedel=100 falldel=200}
C {74ls00.sym} 790 -440 0 0 {name=U1:1  risedel=100 falldel=200}
C {lab_pin.sym} 890 -440 0 1 {name=p0 lab=OUTPUT_Y}
C {capa.sym} 590 -160 0 0 {name=C0 m=1 value=100u device="electrolitic capacitor"}
C {74ls00.sym} 340 -460 0 0 {name=U1:4 risedel=100 falldel=200 power=VCC5
url="http://www.engrcs.com/components/74LS00.pdf".sym}
C {LM7805.pdf"}
C {lab_pin.sym} 490 -190 0 0 {name=p20 lab=VCC12}
C {lab_pin.sym} 940 -190 0 1 {name=p22 lab=VCC5}
C {lab_pin.sym} 590 -110 0 0 {name=p23 lab=ANALOG_GND}
C {capa.sym} 890 -160 0 0 {name=C4 m=1 value=10u device="tantalium capacitor"}
C {res.sym} 520 -190 1 0 {name=R0 m=1 value=4.7 device="carbon resistor"}
C {lab_wire.sym} 620 -460 0 0 {name=l3 lab=A}
C {lab_wire.sym} 620 -420 0 0 {name=l0 lab=B}
C {lab_wire.sym} 650 -190 0 0 {name=l1 lab=VCCFILT}
C {connector.sym} 230 -370 0 0 {name=CONN1 lab=INPUT_A verilog_type=reg}
C {connector.sym} 230 -330 0 0 {name=CONN2 lab=INPUT_B verilog_type=reg}
C {connector.sym} 240 -190 0 0 { name=CONN3 lab=OUTPUT_Y }
C {connector.sym} 230 -480 0 0 {name=CONN6 lab=INPUT_E verilog_type=reg}
C {connector.sym} 230 -440 0 0 {name=CONN8 lab=INPUT_F verilog_type=reg}
C {connector.sym} 240 -160 0 0 { name=CONN9 lab=VCC12 }
C {connector.sym} 240 -130 0 0 { name=CONN14 lab=ANALOG_GND  verilog_type=reg}
C {connector.sym} 240 -100 0 0 { name=CONN15 lab=GND  verilog_type=reg}
C {code.sym} 1030 -280 0 0 {name=TESTBENCH_CODE only_toplevel=false value="initial begin
  $dumpfile(\\"dumpfile.vcd\\");
  $dumpvars;
  INPUT_E=0;
  INPUT_F=0;
  INPUT_A=0;
  INPUT_B=0;
  ANALOG_GND=0;
  #10000;
  INPUT_A=1;
  INPUT_B=1;
  #10000;
  INPUT_E=1;
  INPUT_F=1;
  #10000;
  INPUT_F=0;
  #10000;
  INPUT_B=0;
  #10000;
  $finish;
end

assign VCC12=1;

"}
C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns" }
 


XSCHEM COMMAND REFERENCE DOCUMENTATION


The following are xschem specific tcl commands. All commands are prefixed by the xschem keyword.
Example:

     xschem getprop instance x3 OFFSET 

XSCHEM TCL GLOBAL VARIABLES


   # default command for first spice simulation command (interactive ngspice) 
   sim(spice,0,cmd) {$terminal -e 'ngspice -i "$N" -a || sh'}

   # flag for foreground (1) or background (0) operation
   sim(spice,0,fg) 0

   # flag for status dialog box opening (1) at simulation end or not (0)
   sim(spice,0,st) 0

   sim(spice,1,cmd) {ngspice -b -r "$n.raw" -o "$n.out" "$N"}
   sim(spice,1,fg) 0
   sim(spice,1,st) 1
   sim(spice,2,cmd) "Xyce \"\$N\"\n# Add -r \"\$n.raw\" if you want all variables saved"
   sim(spice,2,fg) 0
   sim(spice,2,st) 1
   sim(spice,3,cmd) {mpirun /path/to/parallel/Xyce "$N"}
   sim(spice,3,fg) 0
   sim(spice,3,st) 1

   # Number of configured spice simulation commands (4), [ sim(spice,0,...) ... sim(spice,3,...) ]
   sim(spice,n) 4

   # default spice command to use (0) --> sim(spice,0,...)
   sim(spice,default) 0

   sim(spicewave,0,cmd) {gaw "$n.raw" } 
   sim(spicewave,0,fg) 0
   sim(spicewave,0,st) 0
   sim(spicewave,1,cmd) {$terminal -e ngspice}
   sim(spicewave,1,fg) 0
   sim(spicewave,1,st) 0
   sim(spicewave,2,cmd) {rawtovcd -v 1.5 "$n.raw" > "$n.vcd" && gtkwave "$n.vcd" "$n.sav" 2>/dev/null} 
   sim(spicewave,2,fg) 0
   sim(spicewave,2,st) 0
   sim(spicewave,3,cmd) {$env(HOME)/analog_flavor_eval/bin/bspwave --socket localhost $bespice_listen_port "$n.raw" } 
   sim(spicewave,3,fg) 0
   sim(spicewave,3,st) 0
   sim(spicewave,n) 4
   sim(spicewave,default) 0

   # list of configured tools. For each of these there is a set of sim(tool,...) settings
   sim(tool_list) spice spicewave verilog verilogwave vhdl vhdlwave

   sim(verilog,0,cmd) {iverilog -o .verilog_object -g2012 "$N" && vvp .verilog_object}
   sim(verilog,0,fg) 0
   sim(verilog,0,st) 1
   sim(verilog,n) 1
   sim(verilog,default) 0
   sim(verilogwave,0,cmd) {gtkwave dumpfile.vcd "$N.sav" 2>/dev/null}
   sim(verilogwave,0,fg) 0
   sim(verilogwave,0,st) 0
   sim(verilogwave,n) 1
   sim(verilogwave,default) 0
   sim(vhdl,0,cmd) {ghdl -c --ieee=synopsys -fexplicit "$N" -r "$s" --wave="$n.ghw"}
   sim(vhdl,0,fg) 0
   sim(vhdl,0,st) 1
   sim(vhdl,n) 1
   sim(vhdl,default) 0
   sim(vhdlwave,0,cmd) {gtkwave "$n.ghw" "$N.sav" 2>/dev/null}
   sim(vhdlwave,0,fg) 0
   sim(vhdlwave,0,st) 0
   sim(vhdlwave,n) 1
   sim(vhdlwave,default) 0

   add_all_windows_drives 1
   autofocus_mainwindow 1
   auto_hilight 0
   autotrim_wires 0
   bespice_listen_port {}
   bespice_server_getdata
   big_grid_points 0
   bus_replacement_char {} ;# use {<>} to replace [] with <> in bussed signals
   cadlayers 22
   cairo_font_line_spacing 1.0
   cairo_font_name {Sans-Serif}
   cairo_font_scale 1.0
   cairo_vert_correct 0
   case_insensitive 0
   change_lw 1
   color_ps 1
   colors $dark_colors
   compare_sch 0
   component_browser_on_top 1
   connect_by_kissing 0
   constrained_move 0
   copy_cell 0
   dark_colors {
     "#000000" "#00ccee" "#3f3f3f" "#cccccc" "#88dd00" "#bb2200" "#00ccee" "#ff0000"
     "#ffff00" "#ffffff" "#ff00ff" "#00ff00" "#0044dd" "#aaaa00" "#aaccaa" "#ff7777"
     "#bfff81" "#00ffcc" "#ce0097" "#d2d46b" "#ef6158" "#fdb200"}
   dark_colorscheme 1
   dark_colors_save
   debug_var 0
   delay_flag
   dim_bg 0.0
   dim_value 0.0
   dircolor(/share/doc/xschem/) {#338844}
   dircolor(/share/xschem/) red
   disable_unique_names 0
   download_url_helper {curl -f -s -O}
   draw_grid 1
   draw_window 0
   editor {gvim -f}
   edit_prop_size 80x12
   edit_symbol_prop_new_sel {}
   enable_dim_bg 0
   enable_layer($i) 1
   enable_stretch 0
   en_hilight_conn_inst 0
   execute(cmd,<id>)
   execute(data,<id>)
   execute(status,<id>)
   execute(cmd,last)
   execute(data,last)
   execute(status,last)
   execute(error,last)
   execute(exitcode,last)
   execute(id)
   flat_netlist 0
   fullscreen 0
   gaw_tcp_address {localhost 2020}
   graph_bus 0
   graph_logx 0
   graph_logy 0
   graph_rainbow 0
   graph_raw_level -1 ;# hierarchy level where raw file has been loaded 
   graph_schname {}
   graph_sel_color 4
   graph_selected {}
   graph_sel_wave {}
   graph_sort 0
   has_cairo 1
   has_x
   hide_empty_graphs 0 ;# if set to 1 waveform boxes will be hidden if no raw file loaded
   hide_symbols 0
   incr_hilight 1

   # text saved into the ERC informational dialog box.
   # netlist warnings and errors are shown here.
   infowindow_text 

   initial_geometry {900x600}
   launcher_default_program {xdg-open}
   light_colors {
     "#ffffff" "#0044ee" "#aaaaaa" "#222222" "#229900" "#bb2200" "#00ccee" "#ff0000"
     "#888800" "#00aaaa" "#880088" "#00ff00" "#0000cc" "#666600" "#557755" "#aa2222"
     "#7ccc40" "#00ffcc" "#ce0097" "#d2d46b" "#ef6158" "#fdb200"}
   light_colors_save
   line_width 0
   live_cursor2_backannotate 0

   # if set use <sch_dir>/simulation for netlist and sims
   local_netlist_dir 0

   lvs_ignore 0
   lvs_netlist 0
   measure_text "y=\nx="
   menu_debug_var 0
   myload_files2 {}
   myload_globfilter {*}
   myload_index1 0
   netlist_dir "$USER_CONF_DIR/simulations"
   netlist_show 0
   netlist_type spice
   nocairo_font_xscale .85
   nocairo_font_yscale .88
   nocairo_vert_correct 0
   no_change_attrs 0
   nolist_libs {}
   noprint_libs {}
   only_probes 0  ; # 20110112
   OS
   persistent_command 0
   preserve_unchanged_attrs 0
   rainbow_colors 0
   search_schematic 0
   show_hidden_texts 0
   show_infowindow 0 
   show_infowindow_after_netlist 0
   show_pin_net_names 0
   spiceprefix 1
   split_files 0
   svg_font_name {Sans-Serif}
   symbol_width 150
   sym_txt 1
   tabbed_interface 0
   tcl_files {}
   tclstop 0
   terminal xterm
   text_line_default_geometry 80x12
   textwindow_wcounter
   toolbar_horiz   1
   toolbar_list {  ... }
   toolbar_visible 0
   to_pdf {ps2pdf}
   to_png {gm convert} 
   transparent_svg 0
   undo_type disk
   unzoom_nodrift 0
   use_tclreadline 1 ;# use the tclreadline package for command prompt. default: 1
   USER_CONF_DIR
   verilog_2001 1
   verilog_bitblast 0
   viewdata_wcounter
   xschem_libs {}
   xschem_listen_port {}
   xschem_server_getdata
   XSCHEM_SHAREDIR
   XSCHEM_START_WINDOW {}
   XSCHEM_TMP_DIR {/tmp}
   zoom_full_center 0
 

Simulator / waveform setup

In xschem a tcl array variable sim is used to specify external process commands, like simulators and waveform viewers. This variable is set in the GUI with the Simulation-> Configure simulators and tools menu entry. First of all you need to set the tool_list list of configured tools:

     set sim(tool_list) { spice spicewave verilog verilogwave vhdl vhdlwave } 

For each tool you need to define some sub elements:

     # Number of configured spice simulation commands (4), [ sim(spice,0,...) ... sim(spice,3,...) ]
     sim(spice,n) 4
     # default spice command to use (0) --> sim(spice,0,...)
     sim(spice,default) 0
     # default command for first spice simulation command (interactive ngspice)
     sim(spice,0,cmd) {$terminal -e 'ngspice -i "$N" -a || sh'}
     # flag for foreground (1) or background (0) operation
     sim(spice,0,fg) 0
     # flag for status dialog box opening (1) at simulation end or not (0)
     sim(spice,0,st) 0
     sim(spice,1,cmd) {ngspice -b -r "$n.raw" -o "$n.out" "$N"}
     sim(spice,1,fg) 0
     sim(spice,1,st) 1
     sim(spice,2,cmd) "Xyce \"\$N\"\n# Add -r \"\$n.raw\" if you want all variables saved"
     sim(spice,2,fg) 0
     sim(spice,2,st) 1
     sim(spice,3,cmd) {mpirun /path/to/parallel/Xyce "$N"}
     sim(spice,3,fg) 0
     sim(spice,3,st) 1
  

XSCHEM TCL PROCEDURES


Commands in brackets are internal procedures, not supposed to be used by end users

      # show xschem about dialog
      about

      # given a symbol reference 'sym' return its absolute path
      # Example: % abs_sym_path devices/iopin.sch
      #          /home/schippes/share/xschem/xschem_library/devices/iopin.sym
      abs_sym_path sym

      add_ext
      add_lab_no_prefix
      add_lab_prefix

      # show an alert dialog box and display 'text'.
      # if 'position' is empty (example: alert_ {hello, world} {}) show at mouse coordinates
      # otherwise use specified coordinates example: alert_ {hello, world} +300+400
      # if nowait is 1 do not wait for user to close dialog box
      # if yesnow is 1 show yes and no buttons and return user choice (1 / 0).
      # (this works only if nowait is unset).
      alert_ text [position] [nowait] [yesno]

      ask_save
      attach_labels_to_inst
      balloon
      balloon_show
      bespice_getdata
      bespice_server
      build_widgets
      change_color
      clear_simulate_button
      color_dim
      context_menu
      convert_to_pdf
      convert_to_png
      create_layers_menu
      create_pins

      # pause execution for 'ms milliseconds, keeping event loop responding
      delay [ms]
      delete_ctx
      delete_files
      delete_tab
      descend_hierarchy
      download_url
      edit_file
      edit_netlist
      edit_prop
      edit_vi_netlist_prop
      edit_vi_prop
      enter_text

      # evaluate 'expr'. if 'expr' has errors or does not evaluate return 'expr' as is
      ev expr

      every
      execute
      execute_fileevent
      execute_wait
      fill_graph_listbox

      # find file into $paths directories matching $f
      # use $pathlist global search path if $paths empty
      # recursively descend directories
      find_file f [paths]

      # as above, return only first match found
      find_file_first f [paths]

      # process all symbols in current design, get full path of them if found in 
      # XSCHEM_LIBRARY_PATH search path, then transform them with exactly one 'n_dir'
      # path components added.
      # example: current design has an instance referencing 'lab_pin.sym'
      #          after executing 'fix_symbols 1' the instance symbol reference
      #          will be devices/lab_pin.sym. This will be done only on symbols
      #          that are existing in the current search paths (there is
      #          devices/lab_pin.sym in one of the search paths).
      fix_symbols n_dirs

      from_eng
      gaw_cmd
      gaw_echoline
      get_cell
      get_directory
      get_file_path

      # launch a terminal shell, if 'curpath' is given set path to 'curpath'
      get_shell

      graph_add_nodes
      graph_add_nodes_from_list
      graph_change_wave_color
      graph_edit_properties
      graph_edit_wave
      graph_get_signal_list
      graph_show_measure
      graph_update_nodelist
      hash_string
      history
      housekeeping_ctx
      infowindow
      input_line
      inutile
      inutile_alias_window
      inutile_get_time
      inutile_help_window
      inutile_line
      inutile_read_data
      inutile_template
      inutile_translate
      inutile_write_data
      is_xschem_file
      key_binding
      launcher
      list_hierarchy
      list_tokens
      load_file_dialog
      load_file_dialog_mkdir
      load_file_dialog_up
      load_recent_file
      make_symbol
      make_symbol_lcc

      # find files into $paths directories matching $f
      # use $pathlist global search path if $paths empty
      # recursively descend directories
      match_file f [paths]

      myload_display_preview
      myload_getresult
      myload_place_symbol
      myload_set_colors1
      myload_set_colors2
      myload_set_home
      netlist
      next_tab
      no_open_dialogs
      order
      pack_tabs
      pack_widgets
      path_head
      pin_label
      prev_tab
      print_help_and_exit
      probe_net
      property_search

      # quit xschem closing all tabs/windows (including the first/main) 
      # user has the option to cancel the closing of modified tabs/windows
      # if 'force' is given no confirmation is asked and modified content is lost.
      # the number of schematic views  left over (in addition to main window)
      #  is returned. If only one (the main view) is left command returns 0.
      quit_xschem [force]

      raise_dialog
      read_data
      read_data_nonewline
      read_data_window
      reconfigure_layers_button
      reconfigure_layers_menu
      rectorder
      redef_puts

      # Given an absolute path 'symbol' of a symbol/schematic remove the path prefix
      # if file is in a library directory (a $pathlist dir)
      # Example: rel_sym_path /home/schippes/share/xschem/xschem_library/devices/iopin.sym
      #          devices/iopin.sym
      rel_sym_path symbol
      
      reroute_inst
      reroute_net
      reset_colors
      restore_ctx
      return_release
      rotation
      save_ctx
      save_file_dialog
      save_sim_defaults
      schpins_to_sympins
      select_inst
      select_layers
      set_bindings
      set_env
      set_graph_linewidth
      set_initial_dirs
      set_missing_colors_to_black

      # set 'var' with '$val' if 'var' not existing
      set_ne var val

      # set_netlist_dir force [path]
      # if path is given set as new netlist path where netlists and simulations are done.
      # force should be always set to 1 unless you just want to query current path.
      # select_netlist_dir 0 will return current path (you can get with $netlist_dir as well)
      set_netlist_dir

      set_old_tk_fonts

      # when XSCHEM_LIBRARY_PATH is changed this function is called 
      # by 'trace_set_paths' refresh and cache new library search paths.
      set_paths
      
      set_replace_key_binding

      # Initialize the tcl sim array variable (if not already set) 
      # setting up simulator / wave viewer commands
      set_sim_defaults

      set_tab_names
      setglob
      setup_recent_menu
      setup_tabbed_interface
      setup_tcp_bespice
      setup_tcp_gaw
      setup_tcp_xschem
      setup_toolbar
      sframe

      # show ERC (electrical rule check) dialog box
      show_infotext

      simconf
      simconf_add
      simconf_reset
      simconf_saveconf
      sim_is_ngspice
      sim_is_xyce
      sim_is_Xyce
      simulate
      simulate_button
      simuldir
      source_user_tcl_files
      sub_find_file
      sub_match_file
      swap_compare_schematics
      swap_tabs

      # show a dialog box asking user to switch undo bguffer from memory to disk
      switch_undo

      # evaluate a tcl command from GUI
      tclcmd

      tclcmd_ok_button
      tclpropeval
      tclpropeval2
      text_line
      textwindow
      to_eng
      tolist
      toolbar_add
      toolbar_hide
      toolbar_show

      # this function executes whenever XSCHEM_LIBRARY_PATH changes (registered
      # with a 'trace' command)
      trace_set_paths

      try_download_url
      update_div
      update_graph_node
      update_recent_file
      update_schematic_header
      view_current_sim_output
      waves
      write_data
      write_recent_file
      xschem_getdata
      xschem_server

 

SOME USEFUL SCRIPT EXAMPLES


The following examples show the xschem commands one by one. In general you should create small TCL procedures to perform these tasks. This way you can optimize things, for example creating temporary variables holding the output of the various xschem ... commands.